AI-engineered chips are the future of semiconductor evolution beyond Moore’s Law
We are currently in the midst of a global semiconductor shortage that is negatively impacting the entire technology supply chain. While many markets struggle to source chips and other related materials, the supply of everything from automobiles to graphics cards for PC gaming is too low to meet demand and prices have skyrocketed. sharply. As detrimental as the current semiconductor shortage is, another difficult shortage could loom, and it could block the development and innovation of new chips and processors around the world, without a drastic change in chip design. However, Synopsys CEO Aart de Geus believes his company and its advanced AI design automation tools may have an answer.
Experts have proclaimed Moore’s Law dead for many years. For the uninitiated, Moore’s Law is an observation made by Intel co-founder Gordon Moore, who says that the number of transistors in an integrated circuit (IC) doubles about every two years. After about the third decade or so, whenever I hear about the “death of Moore’s Law” at industry events, I (and about half of the other analysts and reporters in the room) raise the eyes of the sky. But the fact remains that Moore’s Law has stabilized, as chipmakers seek more advanced process nodes, while chip complexity has also increased exponentially.
SysMoore: Leveraging Systemic Technological Advances Beyond the Transistor
In addition to this reality, the number of engineers working to solve the current design problems associated with Moore’s Law has not increased proportionately. This situation revealed systemic problems with the dynamics of the traditional interpretation of Moore’s Law. The challenges presented to chipmakers today are not just related to the number of transistors inserted into the chip being designed. There are new opportunities to harness and advance systemic complexity in addition to the traditional advancements of Moore’s Law. This “SysMoore” era, as de Geus puts it, needs new tools and strategies to keep moving the industry forward, at the pace needed to meet the growing needs of manufacturers and industries – large and small – with seemingly demand. insatiable new products that are as “smart” as possible.
Aart de Geus explained that the central industry challenge is how to achieve AI 1000X compute from the cloud to the edge over the next decade. That means building better chips faster, at lower cost, and he proposes that AI tools be the main game-changing disruption that will make it possible. Synopsys recently demonstrated how a problem that previously took months of an entire design team’s work could be solved with superior results in weeks by a single engineer.
Aart refers to his company’s tool called DSO.ai. Synopsys claims that DSO.ai (Design Space Optimization AI) is the world’s first set of standalone AI tools for chip design. There is probably a nuance in this claim, as semiconductor giants like NVIDIA and Intel have been using AI to help design chips for quite some time now, although Synopsys does not manufacture its own chips. Rather, Synopsys enables its customers to produce their products with advanced chip design tools, verification tools and services, IP integration, and software quality and security testing.
This is not science fiction, AI designs AI chips
Synopsys claims that its DSO.ai tool can dramatically speed up, improve, and reduce the costs associated with something called place-and-route. Location and routing are integral to the design of printed circuit boards, integrated circuits, and Field Programmable Gate Arrays (FPGAs). Just as it seems to be the case, place-and-route (sometimes called PnR or Floorplan Placement) refers to the placement of logical and IP blocks, and the routing of traces and the various interconnects designed to connect them. While various criteria are also central to other stages of a chip’s design cycle, power, frequency, latency, and silicon area are all important considerations when locating and routing, in applications. strict limits of the specific manufacturing process used. Synopsys’ DSO.ai optimizes and streamlines this process by using the iterative nature of artificial intelligence and machine learning, to turn what previously took dozens of engineering weeks, if not months, into something that a junior engineer can do it alone in a few days. DSO.ai iterates over the floor plan and layout of a chip, and learns from each iteration, adjusting and optimizing the chip in its design parameters along the way. Not only does this positively impact the economics and success rate of chip design, but it brings about a fundamental shift in design resources and methodology, freeing up engineers who could previously be busy with tasks. location and routing to deal with and be more creative in other aspects of advanced chip design.
During discussions with de Geus, he further explained that he did not expect to see the global pool of engineers increase by 1000 times anytime soon, and that the scaling up of engineers with the various skills and knowledge to do things like exploring architecture is a hard won reality that will not be relieved anytime soon. But he also believes AI tools are bridging the gap – so designing a custom AI processor is now a possibility, even for the smallest design teams. By offloading the mundane tasks of chip architects, they can begin to solve higher level of abstraction challenges. Perhaps a more important point he makes is that many of the systemically complex challenges facing the industry today cannot be solved by human capabilities alone, no matter how many engineers are there. faced with the problem. In essence, artificial intelligence will be needed to make up for the shortage of human intelligence.
Everything is getting smarter and AI allows us to do a lot more
AI is no longer just a buzzword. Artificial intelligence is used everywhere from silly photo filters in phone apps to recommendation engines, autonomous vehicles, big data analytics, and advanced design automated design tools like DSO.ai. Specialized chips with dedicated AI processors reside almost everywhere, including your smartphone, computers, and the latest automotive technology. Today, the chip industry itself has reached a stage where AI is helping the design of these AI chips, and it is enabling engineering teams of all sizes to compete at the relentless pace required in the industry. semiconductor industry.
“With classic Moore’s Law, we saw an incredible surge in the complexity of scale that ultimately made AI possible. Now, every vertical market seeks to extract economic value from its data by making everything intelligent. This prompted the semiconductor industry to provide an additional 1000X to tackle the systemic complexity created by “smart everything”. But 1000X means overcoming levels of design complexity that far exceed today’s human engineering capabilities and economics. ”, says de Geus.
Renowned engineer Jim Keller recently said: “It’s a bloody miracle; ten years ago, you couldn’t do a hardware boot ”. Keller was referring to advances in Synopsys (and others) design automation that have changed the economics and workforce needed to launch innovative hardware startups. And in March, NUVIA – a young company with around 100 engineers – was acquired by Qualcomm for $ 1.4 billion. This illustrates what is currently possible with these powerful new chip design tools and smart strategies. Old semiconductor paradigms are quickly becoming a thing of the past. Today, these are the best transistors, architectures, and accelerators for the job, and the human-constrained physical design engineering effort no longer has to be a trigger.